Power semiconductor devices are used in an electronic device of a vehicle and various types of electronic devices requiring high voltage and power, and these devices are required to have higher breakdown voltages and lower on-resistance characteristics. In a case of a power semiconductor device using a currently developed GaN technology, it is possible to implement a higher breakdown voltage and a lower on-resistance characteristic in comparison with a silicon technology in the related art, so that a demand for the power semiconductor device is significantly increasing.
A measurement of the breakdown voltage is performed through a method of completely blocking a channel between a drain and a source due to a depletion region by applying a sufficiently lower voltage than a threshold voltage to a gate terminal so that a current does not flow in the channel and then gradually applying high voltages to a drain terminal. When the voltage applied to the drain terminal is gradually increased, the depletion region of the channel gradually becomes narrow and thus the current flowing in the channel increases. In this case, the drain voltage is measured, and an external driving limit bias is evaluated.
In this case, due to a difference between a high voltage applied to the drain terminal and a voltage of a gate terminal located adjacent to the drain terminal, a high electric field is formed between the drain and gate terminals, but such a high electric field should be restricted to obtain a higher breakdown voltage. To this end, a research on a scheme for reducing an intensity of the electric field by using a structure such as a field plate has been made, and a source connection type field plate structure, a gate connection type field plate structure, a drain connection type field plate structure and the like have been developed.
FIGS. 1A and 1B illustrate an example of a GaN power semiconductor device in the related art. FIG. 1A is a cross-sectional view of the device, and FIG. 1B is a plan view of the device.
Referring to FIGS. 1A and 1B, a GaN power semiconductor device 100 in the related art includes a source electrode 103, a drain electrode 105 and a gate electrode 107 formed on a substrate 101 including an AlGaN/GaN epi layer, a field plate 111 formed on an insulating layer 109 and a field plate 115 formed on an insulating layer 113. The field plate 111 and the source electrode 103 are connected by a metal 117, and particularly, both end parts of the field plate 111 and the source electrode 103 are connected by another metal 121. The field plate 115 and the source electrode 103 are connected by a metal 119.
Through such use of a structure, it is possible to obtain an effect of reducing an intensity of an electric field between the drain electrode 105 and the gate electrode 107, but a photomask is additionally required since a process step for forming the field plates 111 and 113 is added and a problem of deteriorating a total yield and reliability of the device due to a complex structure may occur. Further, when the gate electrode 107 is manufactured in a gamma (Γ) shape or a T shape in order to reduce the intensity of the electric field, the structure becomes more complex.
FIG. 2 illustrates another example of a power semiconductor device in the related art.
Referring to FIG. 2, a GaN power semiconductor device 200 in the related art includes a source electrode 203 and a drain electrode 205 formed on a Si substrate 201 including an AlGaN/GaN epi layer, a gate electrode 209 including a gate connection type field plate manufactured in the gamma type, a dielectric layer 207 such as SiN, a source connection type field plate 213 and a metal 211 for connecting the source connection type field plate 213 with the source electrode 203.
The Si substrate 201 includes the AlGaN/GaN epi layer, and a compound ratio, widths and the like of AlGaN and GaN are determined by a separate design. The electrodes 203, 205, and 209 are formed of a metal, and a process is implemented such that the source electrode 203 and the drain electrode 205 have an ohmic contact and the gate electrode 209 has a Schottky contact. Contact configurations of the electrodes by this process generally corresponds to well known types. In a general process order, an active area is first defined, the source electrode 203 and the drain electrode 205 are formed to have the ohmic contact, the dielectric layer 207 such as SiN is formed, and the gate electrode 209 is formed by etching only the dielectric layer located in a part on which the gate electrode 209 is to be formed. Subsequently, the metal 211 is formed on the source electrode 203, and then the source connection type field plate 213 is formed.
In FIG. 2, curves indicated by arrows represent an intensity of an electric field generated between the drain electrode 205, gate electrode 209 and the field plate 213. As described above, it is possible to obtain an effect of partly reducing the intensity of the electric field between the drain electrode 205 and the gate electrode 209 by causing a part of the electric field to be formed on the gate electrode 209 to be formed on the field plate 213 through the field plate structure in the related art. However, an effect of improving the breakdown voltage of the power semiconductor device through the field plate structure in the related art is not so great.